The present invention relates to semiconductor devices and manufacturing methods therefor.
Japanese Patent Publication No. 4090518 (Patent Document 1), Japanese Unexamined Patent Application Publication No. 2014-154596 (Patent Document 2), and the like have proposed a technique for forming a superjunction structure (SJ structure) by introducing impurities into side surfaces of trenches formed in a semiconductor substrate by ion implantation.
Such a method is low in process cost, as compared to a method (multi-epitaxial method) that includes a plurality of repetitions of epitaxial growth of silicon (Si) and ion implantation, or a method (trench-fill method) that includes filling trenches with an epitaxial layer of silicon. In the methods described in Patent Documents 1 and 2, the ratio between the amounts of n-type impurities and p-type impurities are constant at any position in the depth direction of the trench. Thus, the electric field intensity distribution becomes uniform in the depth direction of the trench, so that a high breakdown voltage can be achieved.
Japanese Unexamined Patent Application Publication No. 2002-124675 (Patent Document 3) discloses a method for achieving impurity distribution that is inclined in the depth direction through ion implantation by changing an inclination angle of the side surface of the trench in the depth direction.